High-Precision Priority Encoder Based Integer Division Algorithm
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9531648/9531647/09531809.pdf?arnumber=9531809
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. FPGA Implementation of Various Division Algorithms for Image Processing Applications - A Comparative Analysis;2024 International Conference on Signal Processing, Computation, Electronics, Power and Telecommunication (IConSCEPT);2024-07-04
2. Design, Implementation and Evaluation of a New Variable Latency Integer Division Scheme;IEEE Transactions on Computers;2024-07
3. High Precision Carry-Look-Ahead Logic for Negation, Absolute Value, and Two’s Complement;2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2023-12-04
4. Leveraging a Novel Two-Level Priority Encoder for High-Precision Integer Multiplication;2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS);2023-08-06
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