Computing in memory with FeFETs

Author:

Reis Dayane1,Niemier Michael1,Hu X. Sharon1

Affiliation:

1. University of Notre Dame, Notre Dame, IN, USA

Publisher

ACM

Reference21 articles.

1. Temporal correlation detection using computational phase-change memory

2. A 28 nm configurable memory (tcam/bcam/sram) using push-rule 6t bit cell enabling logic-in-memory;Jeloka S.;JSSC,2016

3. In-memory computation of a machine learning classifier in a standard 6t sram array;Zhang J.;JSSC,2017

4. An energy-efficient VLSI architecture for pattern recognition via deep embedding of computation in SRAM

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1. Emerging Technologies for Memory-Centric Computing;Design and Applications of Emerging Computer Systems;2024

2. FeFET-Based In-Memory Hyperdimensional Encoding Design;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-11

3. LIM-GEN: A Data-Guided Framework for Automated Generation of Heterogeneous Logic-in-Memory Architecture;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28

4. Accelerating Polynomial Modular Multiplication with Crossbar-Based Compute-in-Memory;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28

5. FeFET based Logic-in-Memory design methodologies, tools and open challenges;2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC);2023-10-16

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