Making the fast case common and the uncommon case simple in unbounded transactional memory

Author:

Blundell Colin1,Devietti Joe1,Lewis E. Christopher2,Martin Milo M. K.1

Affiliation:

1. University of Pennsylvania, Philadelphia, PA

2. VMware: Inc., Palo Alto, PA

Abstract

Hardware transactional memory has great potential to simplify the creation ofcorrect and efficient multithreaded programs, allowing programmers to exploitmore effectively the soon-to-be-ubiquitous multi-core designs. Several recentproposals have extended the original bounded transactional memory to unboundedtransactional memory, a crucial step toward transactions becoming ageneral-purpose primitive. Unfortunately, supporting the concurrent executionof an unbounded number of unbounded transactions is challenging, and as aresult, many proposed implementations are complex. This paper explores a different approach. First, we introduce thepermissions-only cache to extend the bound at which transactions overflow toallow the fast, bounded case to be used as frequently as possible. Second, wepropose OneTM to simplify the implementation of unbounded transactional memoryby bounding the concurrency of transactions that overflow the cache. Thesemechanisms work synergistically to provide a simple and fast unboundedtransactional memory system. The permissions-only cache efficiently maintains the coherencepermissions-but not data-for blocks read or written transactionally thathave been evicted from the processor's caches. By holding coherencepermissions for these blocks, the regular cache coherence protocol can be usedto detect transactional conflicts using only a few bits of on-chip storage peroverflowed cache block.OneTM allows only one overflowed transaction at a time, relying on thepermissions-only cache to ensure that overflow is infrequent. We present twoimplementations. In OneTM-Serialized, an overflowed transaction simply stallsall other threads in the application. In OneTM-Concurrent, non-overflowedtransactions and non-transactional code can execute concurrently with theoverflowed transaction, providing more concurrency while retaining OneTM's coresimplifying assumption.

Publisher

Association for Computing Machinery (ACM)

Cited by 39 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Understanding and utilizing hardware transactional memory capacity;Proceedings of the 2021 ACM SIGPLAN International Symposium on Memory Management;2021-06-22

2. Unbounded Hardware Transactional Memory for a Hybrid DRAM/NVM Memory System;2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO);2020-10

3. Investigating Transactional Memory for High Performance Embedded Systems;Architecture of Computing Systems – ARCS 2020;2020

4. Improving hardware transactional memory parallelization of computational geometry algorithms using privatizing transactions;Journal of Parallel and Distributed Computing;2019-09

5. Transactional concurrency control for intermittent, energy-harvesting computing systems;Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation;2019-06-08

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