Revisiting Loop Tiling for Datacenters-Reference-Cited by-同舟云学术

Revisiting Loop Tiling for Datacenters

Published:2018-06-12 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2018 International Conference on Supercomputing
language:
Short-container-title:

Author:

Zhao Jiacheng¹,Cui Huimin²,Zhang Yalin¹,Xue Jingling³,Feng Xiaobing⁴

Affiliation:

1. State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China

2. SKL Computer Architecture, ICT, CAS, University of Chinese Academy of Sciences, Beijing, China

3. School of Computer Science and Engineering, University of New South Wales, Sydney, NSW, Australia

4. SKL Computer Architecture, ICT, CAS, University of Chinese Academy of Sciences

Funder

National Key R&D Program of China

Publisher

ACM

Link

Reference57 articles.

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. AMULET: Adaptive Matrix-Multiplication-Like Tasks;Proceedings of the 19th International Workshop on Data Management on New Hardware;2023-06-18

2. Designing Secure Performance Metrics for Last Level Cache;2023 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2023-05

5. Bandwidth-Aware Loop Tiling for DMA-Supported Scratchpad Memory;Proceedings of the ACM International Conference on Parallel Architectures and Compilation Techniques;2020-09-30