Exploring multi-banked shared-L1 program cache on ultra-low power, tightly coupled processor clusters
Author:
Affiliation:
1. University of Bologna, Bologna - Italy
2. ST Microelectronics, Grenoble - France
3. Integrated Systems Laboratory ETZ, Zurich - Switzerland
4. University of Bologna, Italy and Integrated Systems Laboratory ETZ, Switzerland
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2742854.2747288
Reference17 articles.
1. Using dynamic cache management techniques to reduce energy in general purpose processors
2. Exploring instruction caching strategies for tightly-coupled shared-memory clusters
3. Bulldozer: An Approach to Multithreaded Compute Performance
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