Multi-core Devices for Safety-critical Systems

Author:

Cerrolaza Jon Perez1ORCID,Obermaisser Roman2,Abella Jaume3ORCID,Cazorla Francisco J.3,Grüttner Kim4,Agirre Irune1,Ahmadian Hamidreza2,Allende Imanol1

Affiliation:

1. Ikerlan, Spain

2. Universität Siegen, Siegen, Germany

3. Barcelona Supercomputing Center (BSC-CNS), Barcelona, Spain

4. OFFIS – Institute for Information Technology, Oldenburg, Germany

Abstract

Multi-core devices are envisioned to support the development of next-generation safety-critical systems, enabling the on-chip integration of functions of different criticality. This integration provides multiple system-level potential benefits such as cost, size, power, and weight reduction. However, safety certification becomes a challenge and several fundamental safety technical requirements must be addressed, such as temporal and spatial independence, reliability, and diagnostic coverage. This survey provides a categorization and overview at different device abstraction levels (nanoscale, component, and device) of selected key research contributions that support the compliance with these fundamental safety requirements.

Funder

Ekonomiaren Garapen eta Lehiakortasun Saila, Eusko Jaurlaritza

Spanish Ministry of Economy and Competitiveness

HiPEAC Network of Excellence

Publisher

Association for Computing Machinery (ACM)

Subject

General Computer Science,Theoretical Computer Science

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