Author:
Callahan Timothy J.,Wawrzynek John
Cited by
19 articles.
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1. Control flow coalescing on a hybrid dataflow/von Neumann GPGPU;Proceedings of the 48th International Symposium on Microarchitecture;2015-12-05
2. Single-graph multiple flows;ACM SIGARCH Computer Architecture News;2014-10-16
3. Improving performance of nested loops on reconfigurable array processors;ACM Transactions on Architecture and Code Optimization;2012-01
4. Reducing Memory Constraints in Modulo Scheduling Synthesis for FPGAs;ACM Transactions on Reconfigurable Technology and Systems;2010-09
5. Compiling for reconfigurable computing;ACM Computing Surveys;2010-06