A Clock Tree Optimization Framework with Predictable Timing Quality

Author:

Ewetz Rickard1

Affiliation:

1. Department of Electrical and Computer Engineering, University of Central Florida, Orlando, US

Publisher

ACM

Reference15 articles.

1. R. Ewetz S. Janarthanan and C.-K. Koh. Benchmark circuits for clock scheduling and synthesis. https://purr.purdue.edu/publications/1759 2015. R. Ewetz S. Janarthanan and C.-K. Koh. Benchmark circuits for clock scheduling and synthesis. https://purr.purdue.edu/publications/1759 2015.

2. Construction of reconfigurable clock trees for MCMM designs

3. MCMM clock tree optimization based on slack redistribution using a reduced slack graph

4. Construction of Reconfigurable Clock Trees for MCMM Designs Using Mode Separation and Scenario Compression

5. A global-local optimization framework for simultaneous multi-mode multi-corner clock skew variation reduction

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3. Soft-Clustering Driven Flip-flop Placement Targeting Clock-induced OCV;Proceedings of the 2020 International Symposium on Physical Design;2020-03-20

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