Bandwidth Optimization Through On-Chip Memory Restructuring for HLS

Author:

Cong Jason1,Wei Peng1,Yu Cody Hao1,Zhou Peipei1

Affiliation:

1. University of California, Los Angeles

Funder

Intel Corporation

Semiconductor Research Corporation

Defense Advanced Research Projects Agency

National Science Foundation

Publisher

ACM

Reference24 articles.

1. A reconfigurable fabric for accelerating large-scale datacenter services

2. J. Ouyang etal "Sda: Software-defined accelerator for largescale dnn systems " in Hot Chips 2014. J. Ouyang et al. "Sda: Software-defined accelerator for largescale dnn systems " in Hot Chips 2014.

3. "Amazon ec2 f1 instance " 2016. https://aws.amazon.com/ec2/instance-types/f1/. "Amazon ec2 f1 instance " 2016. https://aws.amazon.com/ec2/instance-types/f1/.

4. "Intel to Start Shipping Xeons With FPGAs in Early 2016." http://www.eweek.com/servers/intel-to-start-shipping-xeons-with-fpgas-in-early-2016.html. "Intel to Start Shipping Xeons With FPGAs in Early 2016." http://www.eweek.com/servers/intel-to-start-shipping-xeons-with-fpgas-in-early-2016.html.

5. High-Level Synthesis for FPGAs: From Prototyping to Deployment

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