PARR
Author:
Affiliation:
1. Univ. of Texas at Austin, Austin, TX
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2744769.2744890
Reference20 articles.
1. M.-K. Hsu N. Katta H. Y.-H. Lin K. T.-H. Lin K. H. Tam and K. C.-H. Wang "Design and manufacturing process co-optimization in nano-technology " in IEEE/ACM International Conference on Computer-Aided Design (ICCAD) 2014 pp. 574--581. M.-K. Hsu N. Katta H. Y.-H. Lin K. T.-H. Lin K. H. Tam and K. C.-H. Wang "Design and manufacturing process co-optimization in nano-technology " in IEEE/ACM International Conference on Computer-Aided Design (ICCAD) 2014 pp. 574--581.
2. Self-aligned double patterning aware pin access and standard cell layout co-optimization
3. Sub-12nm optical lithography with 4x pitch division and SMO-lite;Smayling M. C.;Proc. of SPIE,2013
4. RegularRoute
5. Avoiding wafer-print artifacts in spacer is dielectric (SID) patterning;Luk-Pat G.;Proc. of SPIE,2013
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3. NCTUcell: A DDA- and Delay-Aware Cell Library Generator for FinFET Structure With Implicitly Adjustable Grid Map;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022-12
4. Enhanced pin-access prediction and design optimization with machine learning integration;Microelectronics Journal;2021-10
5. Pin Accessibility Prediction and Optimization with Deep Learning-based Pin Pattern Recognition;Proceedings of the 56th Annual Design Automation Conference 2019;2019-06-02
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