New game, new goal posts
Author:
Affiliation:
1. UC San Diego, La Jolla, CA
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2744769.2747937
Reference45 articles.
1. On Aging-Aware Signoff for Circuits with Adaptive Voltage Scaling;Chan T.-B.;IEEE Trans. on CAS-I,2014
2. Improved signoff methodology with tightened BEOL corners
3. Synthesis and Analysis of Design-Dependent Ring Oscillator (DDRO) Performance Monitors
4. Tunable sensors for process-aware voltage scaling
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1. Timing-Driven Technology Mapping Approximation Based on Reinforcement Learning;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-09
2. Integrating Operations Research into Very Large-Scale Integrated Circuits Placement Design: A Review;Asia-Pacific Journal of Operational Research;2024-07-06
3. Power, performance, and area evaluation across 180nm-28nm technology nodes based on benchmark circuits;IEICE Electronics Express;2024-05-10
4. AVATAR: An Aging- and Variation-Aware Dynamic Timing Analyzer for Error-Efficient Computing;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-11
5. Invited Paper: Unleashing the Potential of Machine Learning: Harnessing the Dynamics of Supply Noise for Timing Sign-Off;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28
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