Register optimizations for stencils on GPUs

Author:

Rawat Prashant Singh1,Rastello Fabrice2,Sukumaran-Rajam Aravind1,Pouchet Louis-Noël3,Rountev Atanas1,Sadayappan P.1

Affiliation:

1. The Ohio State University

2. INRIA

3. Colorado State University

Funder

U.S. National Science Foundation

U.S. Department of Energy Exascale Computing Project

Publisher

ACM

Cited by 22 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Optimizing VLIW Instruction Scheduling via a Two-Dimensional Constrained Dynamic Programming;ACM Transactions on Design Automation of Electronic Systems;2024-01-25

2. Adaptive Auto-Tuning Framework for Global Exploration of Stencil Optimization on GPUs;IEEE Transactions on Parallel and Distributed Systems;2024-01

3. A Symbolic Emulator for Shuffle Synthesis on the NVIDIA PTX Code;Proceedings of the 32nd ACM SIGPLAN International Conference on Compiler Construction;2023-02-17

4. Toward accelerated stencil computation by adapting tensor core unit on GPU;Proceedings of the 36th ACM International Conference on Supercomputing;2022-06-28

5. GAPS;Proceedings of the 36th ACM International Conference on Supercomputing;2022-06-28

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