HLS-based optimization and design space exploration for applications with variable loop bounds-Reference-Cited by-同舟云学术

HLS-based optimization and design space exploration for applications with variable loop bounds

Published:2018-11-05 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the International Conference on Computer-Aided Design
language:
Short-container-title:

Author:

Choi Young-kyu¹,Cong Jason¹

Affiliation:

1. University of California, Los Angeles

Funder

Intel Corporation

National Science Foundation

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3240765.3240815

Reference30 articles.

1. Amazon. 2018. Amazon EC2 F1 Instance. (2018). https://aws.amazon.com/ec2/instance-types/f1/ Amazon. 2018. Amazon EC2 F1 Instance. (2018). https://aws.amazon.com/ec2/instance-types/f1/

2. R. Chandra etal 2001. Parallel Programming in OpenMP. Morgan Kaufmann San Francisco CA. R. Chandra et al. 2001. Parallel Programming in OpenMP . Morgan Kaufmann San Francisco CA.

3. A sound and complete abstraction for reasoning about parallel prefix sums

Cited by 21 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Array Partitioning Method for Streaming Dataflow Optimization in High-level Synthesis;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10

2. HF-LDPC: HLS-friendly QC-LDPC FPGA Decoder with High Throughput and Flexibility;2023 IEEE 41st International Conference on Computer Design (ICCD);2023-11-06

3. MVSym: Efficient symbiotic exploitation of HLS-kernel multi-versioning for collaborative CPU-FPGA cloud systems;Integration;2023-11

4. Security of Hardware Generators: Enabling Assurance in High-Level Synthesis;2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS);2023-08-06

5. R-LDPC: Refining Behavior Descriptions in HLS to Implement High-throughput LDPC Decoder;2023 Design, Automation & Test in Europe Conference & Exhibition (DATE);2023-04