PVT 2-Reference-Cited by-同舟云学术

PVT 2

Published:2018-11-05 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the International Conference on Computer-Aided Design
language:
Short-container-title:

Author:

Islam A. K. M. Mahfuzul¹,Onodera Hidetoshi²

Affiliation:

1. The University of Tokyo, Meguro-ku, Tokyo

2. Kyoto University, Kyoto, Kyoto

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3240765.3243491

Reference22 articles.

1. Noise in solid-state microstructures: A new perspective on individual defects, interface states and low-frequency (1/ƒ) noise

2. Increasing threshold voltage variation due to random telegraph noise in FETs as gate lengths scale to 20 nm;Tega N.;Symposium on VLSI Technology Digest of Technical Papers,2009

3. Impact of random telegraph noise on write stability in Silicon-on-Thin-BOX (SOTB) SRAM cells at low supply voltage;Qiu H.;Sub-0.4V regime," Symposium on VLSI Technology Digest of Technical Papers,2015

4. Impact of random telegraph noise on CMOS logic delay uncertainty under low voltage operation;Matsumoto T.;IEEE Electron Devices Meeting,2012

5. Comprehensive Analysis of Random Telegraph Noise Instability and Its Scaling in Deca–Nanometer Flash Memories

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