MergeTree

Author:

Viitanen Timo1ORCID,Koskela Matias1,Jääskeläinen Pekka1,Kultala Heikki1,Takala Jarmo1

Affiliation:

1. Tampere University of Technology, Finland

Abstract

Ray tracing is a computationally intensive rendering technique traditionally used in offline high-quality rendering. Powerful hardware accelerators have been recently developed that put real-time ray tracing even in the reach of mobile devices. However, rendering animated scenes remains difficult, as updating the acceleration trees for each frame is a memory-intensive process. This article proposes MergeTree, the first hardware architecture for Hierarchical Linear Bounding Volume Hierarchy (HLBVH) construction, designed to minimize memory traffic. For evaluation, the hardware constructor is synthesized on a 28nm process technology. Compared to a state-of-the-art binned surface area heuristic sweep (SAH) builder, the present work speeds up construction by a factor of 5, reduces build energy by a factor of 3.2, and memory traffic by a factor of 3. A software HLBVH builder on a graphics processing unit (GPU) requires 3.3 times more memory traffic. To take tree quality into account, a rendering accelerator is modeled alongside the builder. Given the use of a toplevel build to improve tree quality, the proposed builder reduces system energy per frame by an average 41% with primary rays and 13% with diffuse rays. In large ( > 500K triangles) scenes, the difference is more pronounced, 62% and 35%, respectively.

Publisher

Association for Computing Machinery (ACM)

Subject

Computer Graphics and Computer-Aided Design

Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. QuickTree: A Fast Hardware BVH Construction Engine;Proceedings of the 21st ACM International Conference on Computing Frontiers;2024-05-07

2. A Study of Characterization and Scene Interaction Narratives of Animated Characters Empowered by AIGC;Applied Mathematics and Nonlinear Sciences;2024-01-01

3. Creating SORDI: The Largest Synthetic Dataset for Industries;Synthetic Data;2024

4. Building Oriented Bounding Boxes by the intermediate use of ODOPs;Computers & Graphics;2023-11

5. Mach-RT: A Many Chip Architecture for High Performance Ray Tracing;IEEE Transactions on Visualization and Computer Graphics;2022-03-01

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