On construction low power and robust clock tree via slew budgeting
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ACM Press
Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Clock Tree Construction based on Arrival Time Constraints;Proceedings of the 2017 ACM on International Symposium on Physical Design;2017-03-19
2. Low power obstacle and skew aware clock tree synthesis;Communication and Computing Systems;2016-11-09
3. Variation-aware clock network buffer sizing using robust multi-objective optimization;Optimization and Engineering;2016-04-01
4. Clock Tree Synthesis Considering Slew Effect on Supply Voltage Variation;ACM Transactions on Design Automation of Electronic Systems;2014-11-18
5. Optimal gate sizing using a self-tuning multi-objective framework;Integration;2014-06
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