Implementing an Efficient Path Based Equivalence Checker for Parallel Programs
Author:
Affiliation:
1. BITS Pilani-Goa, Goa, India
2. Indian Institute of Technology Kharagpur, Kharagpur, India
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2916026.2916027
Reference39 articles.
1. Translation Validation for PRES+ Models of Parallel Behaviours via an FSMD Equivalence Checker
2. A Path-based Equivalence Checking Method for Petri Net based Models of Programs
3. S. Bandyopadhyay D. Sarkar K. Banerjee C. A. Mandal and K. R. Duddu. A path construction algorithm for translation validation using pres models. Parallel processing letter (to appear) 2015. S. Bandyopadhyay D. Sarkar K. Banerjee C. A. Mandal and K. R. Duddu. A path construction algorithm for translation validation using pres models. Parallel processing letter (to appear) 2015.
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