Reducing Code Size in Scheduling Synchronous Dataflow Graphs on Multicore Systems-Reference-Cited by-同舟云学术

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Reducing Code Size in Scheduling Synchronous Dataflow Graphs on Multicore Systems

Published:2018 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 9th Workshop and 7th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms - PARMA-DITAM '18
language:
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Author:

Ma Mingze¹,Sakellariou Rizos¹

Affiliation:

1. School of Computer Science, The University of Manchester, UK

Publisher

ACM Press

Reference12 articles.

1. Árpád Beszédes, Rudolf Ferenc, Tibor Gyimóthy, André Dolenc, and Konsta Karsisto. 2003. Survey of code-size reduction methods. Comput. Surveys 35, 3 (2003), 223--267.

2. Koen Danckaert, Kostas Masselos, F Cathoor, Hugo J De Man, and Costas Goutis. 1999. Strategy for power-efficient design of parallel systems. IEEE Trans. VLSI Syst 7, 2 (1999), 258--265.

3. Edward Ashford Lee and David G Messerschmitt. 1987. Static scheduling of synchronous data flow programs for digital signal processing. IEEE Trans. Comput. 100, 1 (1987), 24--35.

4. Charles E Leiserson and James B Saxe. 1991. Retiming synchronous circuitry. Algorithmica 6, 1 (1991), 5--35.

5. Mingze Ma and Rizos Sakellariou. Code-size-aware mapping for synchronous dataflow graphs on multicore systems. In CASES. (work in progress).

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1. Software synthesis from dataflow schedule graphs;SN Applied Sciences;2021-01-16

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