General-purpose code acceleration with limited-precision analog computation

Author:

St. Amant Renée1,Yazdanbakhsh Amir2,Park Jongse2,Thwaites Bradley2,Esmaeilzadeh Hadi2,Hassibi Arjang1,Ceze Luis3,Burger Doug4

Affiliation:

1. University of Texas at Austin

2. Georgia Institute of Technology

3. University of Washington

4. Microsoft Research

Abstract

As improvements in per-transistor speed and energy efficiency diminish, radical departures from conventional approaches are becoming critical to improving the performance and energy efficiency of general-purpose processors. We propose a solution--from circuit to compiler-that enables general-purpose use of limited-precision, analog hardwareto accelerate "approximable" code---code that can tolerate imprecise execution. We utilize an algorithmic transformation that automatically converts approximable regions of code from a von Neumann model to an "analog" neural model. We outline the challenges of taking an analog approach, including restricted-range value encoding, limited precision in computation, circuit inaccuracies, noise, and constraints on supported topologies. We address these limitations with a combination of circuit techniques, a hardware/software interface, neuralnetwork training techniques, and compiler support. Analog neural acceleration provides whole application speedup of 3.7x and energy savings of 6.3x with quality loss less than 10% for all except one benchmark. These results show that using limited-precision analog circuits for code acceleration, through a neural approach, is both feasible and beneficial over a range of approximation-tolerant, emerging applications including financial analysis, signal processing, robotics, 3D gaming, compression, and image processing

Funder

Google

Microsoft Research

Division of Computing and Communication Foundations

Publisher

Association for Computing Machinery (ACM)

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