ObNoCs : Protecting Network-on-Chip Fabrics Against Reverse-Engineering Attacks

Author:

Halder Dipal1ORCID,Merugu Maneesh1ORCID,Ray Sandip1ORCID

Affiliation:

1. University of Florida, USA

Abstract

Modern System-on-Chip designs typically use Network-on-Chip (NoC) fabrics to implement coordination among integrated hardware blocks. An important class of security vulnerabilities involves a rogue foundry reverse-engineering the NoC topology and routing logic. In this paper, we develop an infrastructure, ObNoCs , for protecting NoC fabrics against such attacks. ObNoCs systematically replaces router connections with switches that can be programmed after fabrication to induce the desired topology. Our approach provides provable redaction of NoC functionality: switch configurations induce a large number of legal topologies, only one of which corresponds to the intended topology. We implement the ObNoCs methodology on Intel Quartus™ Platform, and experimental results on realistic SoC designs show that the architecture incurs minimal overhead in power, resource utilization, and system latency.

Funder

Defense Advanced Research Projects Agency under the SAHARA Program

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Software

Reference47 articles.

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3. [n. d.]. Intel® Agilex™ I-Series FPGA and SoC FPGA. https://www.intel.com/content/www/us/en/products/details/fpga/agilex/i-series/docs.html

4. Dana universal dataflow analysis for gate-level netlist reverse engineering;Albartus Niels;IACR Transactions on Cryptographic Hardware and Embedded Systems,2020

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