Author:
Peir Jih-Kwon,Lee Yongjoon,Hsu Windsor W.
Cited by
11 articles.
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1. A comparative analysis of performance improvement schemes for cache memories;Computers & Electrical Engineering;2012-03
2. Reducing cache misses through programmable decoders;ACM Transactions on Architecture and Code Optimization;2008-01
3. Balanced Cache;ACM SIGARCH Computer Architecture News;2006-05
4. The V-Way Cache;ACM SIGARCH Computer Architecture News;2005-05
5. Improving Power Efficiency with an Asymmetric Set-Associative Cache;High Performance Memory Systems;2004