Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs
-
Published:2022-01-31
Issue:1
Volume:18
Page:1-37
-
ISSN:1550-4832
-
Container-title:ACM Journal on Emerging Technologies in Computing Systems
-
language:en
-
Short-container-title:J. Emerg. Technol. Comput. Syst.
Author:
Chaudhuri Arjun1,
Banerjee Sanmitra1,
Kim Jinwoo2,
Park Heechun2,
Ku Bon Woong2,
Kannan Sukeshwar3,
Chakrabarty Krishnendu1,
Lim Sung Kyu2
Affiliation:
1. Duke University, Durham, NC
2. Georgia Institute of Technology, Atlanta, GA
3. Broadcom Inc., San Jose, CA
Abstract
Monolithic 3D (M3D) integration provides massive vertical integration through the use of nanoscale inter-layer vias (ILVs). However, high integration density and aggressive scaling of the inter-layer dielectric make ILVs especially prone to defects. We present a low-cost built-in self-test (BIST) method that requires only two test patterns to detect opens, stuck-at faults, and bridging faults (shorts) in ILVs. We also propose an extended BIST architecture for fault detection, called Dual-BIST, to guarantee zero ILV fault masking due to single BIST faults and negligible ILV fault masking due to multiple BIST faults. We analyze the impact of coupling between adjacent ILVs arranged in a 1D array in block-level partitioned designs. Based on this analysis, we present a novel test architecture called Shared-BIST with the added functionality of localizing single and multiple faults, including coupling-induced faults. We introduce a systematic clustering-based method for designing and integrating a delay bank with the Shared-BIST architecture for testing small-delay defects in ILVs with minimal yield loss. Simulation results for four two-tier M3D benchmark designs highlight the effectiveness of the proposed BIST framework.
Funder
DARPA ERI 3DSOC Program
National Science Foundation
Publisher
Association for Computing Machinery (ACM)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Reference54 articles.
1. 1999. OpenCore Benchmark Suite. Retrieved from http://www.opencores.org/. 1999. OpenCore Benchmark Suite. Retrieved from http://www.opencores.org/.
2. 2009. Small-delay-defect Testing. Retrieved from https://www.edn.com/small-delay-defect-testing-2/. 2009. Small-delay-defect Testing. Retrieved from https://www.edn.com/small-delay-defect-testing-2/.
3. 2019. Monolithic 3D Roadmap. Retrieved from https://www.3dincites.com/2019/03/coolcube-more-than-a-true-3d-vlsi-alternative-to-scaling/. 2019. Monolithic 3D Roadmap. Retrieved from https://www.3dincites.com/2019/03/coolcube-more-than-a-true-3d-vlsi-alternative-to-scaling/.
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献