Using implications to choose tests through suspect fault identification

Author:

Dworak Jennifer1,Nepal Kundan2,Alves Nuno3,Shi Yiwen4,Imbriglia Nicholas5,Iris Bahar R.3

Affiliation:

1. Southern Methodist University, Dallas, TX

2. University of St. Thomas, MN

3. Brown University, Providence, RI

4. Oracle, San Jose, CA

5. Intel, WA

Abstract

As circuits continue to scale to smaller feature sizes, wearout and latent defects are expected to cause an increasing number of errors in the field. Online error detection techniques, including logic implication-based checker hardware, are capable of detecting at least some of these errors as they occur. However, recovery may be expensive, and the underlying problem may lead to multiple failures of a core over time. In this article, we will investigate the diagnostic capability of logic implications to identify possible failure locations when an error is detected online. We will then utilize this information to select a highly efficient test set that can be used to effectively test the identified suspect locations in both the failing core and in other identical cores in the system.

Funder

Division of Computing and Communication Foundations

Publisher

Association for Computing Machinery (ACM)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Identification of Stress Fields in a Customized Mandibular Reconstruction Based on a Photoelastic Model;Journal of Craniofacial Surgery;2019-11

2. Repairing a 3-D Die-Stack Using Available Programmable Logic;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2015-05

3. Test compaction techniques for assertion-based test generation;ACM Transactions on Design Automation of Electronic Systems;2013-12

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