EBASA: Error Balanced Approximate Systolic Array Architecture Design-Reference-Cited by-同舟云学术

EBASA: Error Balanced Approximate Systolic Array Architecture Design

Published:2023-06-05 Issue: Volume: Page:
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Container-title:Proceedings of the Great Lakes Symposium on VLSI 2023
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Author:

Nandigama Sai Karthik¹^ORCID,Gowda Bindu G.¹^ORCID,H C Prashanth¹^ORCID,Rao Madhav¹^ORCID

Affiliation:

1. IIIT-Bangalore, Bangalore, India

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3583781.3590296

Reference13 articles.

1. H C Prashanth , S R Soujanya , G Gowda Bindu , and Rao Madhav . Design and evaluation of in-exact compressor based approximate multipliers . In Proceedings of the Great Lakes Symposium on VLSI 2022, GLSVLSI '22 , page 431 -- 436 , New York, NY, USA , 2022 . Association for Computing Machinery. H C Prashanth, S R Soujanya, G Gowda Bindu, and Rao Madhav. Design and evaluation of in-exact compressor based approximate multipliers. In Proceedings of the Great Lakes Symposium on VLSI 2022, GLSVLSI '22, page 431--436, New York, NY, USA, 2022. Association for Computing Machinery.

2. Anatomical-Functional Image Fusion by Information of Interest in Local Laplacian Filtering Domain

3. SAADI-EC: A Quality-Configurable Approximate Divider for Energy Efficiency

4. Approximate Multipliers Based on New Approximate Compressors

5. Novel Approximate Multiplier Designs for Edge Detection Application

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