Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation

Author:

Kabylkas Nursultan1,Thorn Tommy2,Srinath Shreesha3,Xekalakis Polychronis4,Renau Jose5

Affiliation:

1. UCSC

2. Esperanto Technologies

3. Intel

4. Nvidia

5. UC Santa-Cruz, United States of America

Publisher

ACM

Reference47 articles.

1. [n.d.]. [information is disclosed per double-blind peer review guidelines]. [n.d.]. [information is disclosed per double-blind peer review guidelines].

2. Chisel

3. Brian Bailey Harry Foster Chirag Gandhi Tom Anderson Craig Shirley Adam Sherer Rajesh Ramanujam Roger Sabbaugh Vigyan Singhal and Kevin McDermott. 2018. When Bugs Escape). https://semiengineering.com/when-bugs-escape/ Brian Bailey Harry Foster Chirag Gandhi Tom Anderson Craig Shirley Adam Sherer Rajesh Ramanujam Roger Sabbaugh Vigyan Singhal and Kevin McDermott. 2018. When Bugs Escape). https://semiengineering.com/when-bugs-escape/

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1. SurgeFuzz: Surge-Aware Directed Fuzzing for CPU Designs;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28

2. Functional Verification for Agile Processor Development: A Case for Workflow Integration;Journal of Computer Science and Technology;2023-07

3. Toward Developing High-Performance RISC-V Processors Using Agile Methodology;IEEE Micro;2023-07

4. ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance;2023 IEEE International Symposium on Hardware Oriented Security and Trust (HOST);2023-05-01

5. Fault Attacks on Access Control in Processors: Threat, Formal Analysis and Microarchitectural Mitigation;IEEE Access;2023

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