Functional Verification for Agile Processor Development: A Case for Workflow Integration-Reference-Cited by-同舟云学术

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Functional Verification for Agile Processor Development: A Case for Workflow Integration

Published:2023-07 Issue:4 Volume:38 Page:737-753
ISSN:1000-9000
Container-title:Journal of Computer Science and Technology
language:en
Short-container-title:J. Comput. Sci. Technol.

Author:

Xu Yi-Nan,Yu Zi-Hao,Wang Kai-Fan,Wang Hua-Qiang,Lin Jia-Wei,Jin Yue,Zhang Lin-Juan,Zhang Zi-Fei,Tang Dan,Wang Sa,Shi Kan,Sun Ning-Hui,Bao Yun-Gang

Publisher

Springer Science and Business Media LLC

Subject

Computational Theory and Mathematics,Computer Science Applications,Hardware and Architecture,Theoretical Computer Science,Software

Link

https://link.springer.com/content/pdf/10.1007/s11390-023-3285-8.pdf

Reference33 articles.

1. Hennessy J L, Patterson D A. A new golden age for computer architecture. Communications of the ACM, 2019, 62(2): 48–60. https://doi.org/10.1145/3282307.

2. Bao Y G, Carlson T E. Agile and open-source hardware. IEEE Micro, 2020, 40(4): 6–9. https://doi.org/10.1109/MM.2020.3002606.

3. Lee Y, Waterman A, Cook H, Zimmer B, Keller B, Puggelli A, Kwak J, Jevtic R, Bailey S, Blagojevic M, Chiu P F, Avizienis R, Richards B, Bachrach J, Patterson D, Alon E, Nikolic B, Asanović K. An agile approach to building RISC-V microprocessors. IEEE Micro, 2016, 36(2): 8–20. https://doi.org/10.1109/MM.2016.11.

4. Xu Y N, Yu Z H, Tang D, Chen G K, Chen L, Gou L R, Jin Y, Li Q R, Li X, Li Z J, Lin J W, Liu T, Liu Z G, Tan J Z, Wang H Q, Wang H Z, Wang K F, Zhang C Q, Zhang F W, Zhang L J, Zhang Z F, Zhao Y Y, Zhou Y Y, Zhou Y K, Zou J R, Cai Y, Huan D D, Li Z S, Zhao J Y, Chen Z H, He W, Quan Q Y, Liu X, Wang S, Shi K, Sun N H, Bao Y G. Towards developing high performance RISC-V processors using agile methodology. In Proc. the 55th IEEE/ACM International Symposium on Microarchitecture, Oct. 2022, pp.1178–1199. https://doi.org/10.1109/MICRO56248.2022.00080.

5. Xu Y N, Yu Z H, Tang D, Cai Y, Huan D D, He W, Sun N H, Bao Y G. Toward developing high-performance RISC-V processors using agile methodology. IEEE Micro, 2023, 43(4): 98–106. https://doi.org/10.1109/MM.2023.3273562.

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