FLINT: Layout-Oriented FPGA-Based Methodology for Fault Tolerant ASIC Design

Author:

Nowosielski Rochus,Gerlach Lukas,Bieband Stephan,Payá-Vayá Guillermo,Blume Holger

Publisher

IEEE Conference Publications

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Checkpoint Placement for Systematic Fault-Injection Campaigns;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28

2. SEU/SET Evaluation of Digital VLSI Design from Register Transfer Level to Layout Level;2023 7th International Conference on Electrical, Mechanical and Computer Engineering (ICEMCE);2023-10-20

3. FPGA-Based Cross-Hardware MBU Emulation Platform for Layout-Level Digital VLSI;2023 IEEE 32nd Asian Test Symposium (ATS);2023-10-14

4. Radiation Tolerant Reconfigurable Hardware Architecture Design Methodology;Applied Reconfigurable Computing. Architectures, Tools, and Applications;2023

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