1. Fanout-Bounded Logic Synthesis for Emerging Technologies - A Top-Down Approach;2023 Design, Automation & Test in Europe Conference & Exhibition (DATE);2023-04
2. Equivalence Checking;EDA for IC Implementation, Circuit Design, and Process Technology;2018-10-03
3. Equivalence Checking;Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology;2017-02-03
4. Equivalence Checking;Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology;2016-04-14
5. Verification of Static Aspects;Formal Specification Level;2014-10-10