Fanout-Bounded Logic Synthesis for Emerging Technologies - A Top-Down Approach
Author:
Affiliation:
1. EPFL,Integrated Systems Laboratory,Lausanne,Switzerland
Funder
SNSF
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10136870/10136706/10137314.pdf?arnumber=10137314
Reference20 articles.
1. An adiabatic quantum flux parametron as an ultra-low-power logic device
2. SFO: A Scalable Approach to Fanout-Bounded Logic Synthesis for Emerging Technologies
3. Combinatorial Merging
4. Delay optimization using sop balancing;mishchenko;Proceedings of the International Conference on Computer-Aided Design,2011
5. An Optimal Algorithm for Splitter and Buffer Insertion in Adiabatic Quantum-Flux-Parametron Circuits
Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Superconductive Electronics: A 25-Year Review [Feature];IEEE Circuits and Systems Magazine;2024
2. Logic Synthesis for Emerging Technologies;2023 IEEE 15th International Conference on ASIC (ASICON);2023-10-24
3. Fanout-Bounded Logic Synthesis for Emerging Technologies;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023
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