Author:
Yadlapati Avinash,Kishore Kakarla Hari
Cited by
6 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. FIFO Memory Implementation with Reduced Metastability;Smart Innovation, Systems and Technologies;2024
2. Design & Implementation of Novel Asynchronous FIFO;2023 IEEE International Symposium on Smart Electronic Systems (iSES);2023-12-18
3. Bit-Width Conversion Based on Asynchronous FIFO;Highlights in Science, Engineering and Technology;2023-03-16
4. Asynchronous FIFO Design Based on Verilog;Highlights in Science, Engineering and Technology;2023-03-16
5. Optimization of Asynchronous FIFO Design Difficulties Using Verilog HDL;Highlights in Science, Engineering and Technology;2023-03-16