Electrical Chip-Board Interaction (e-CBI) of Wafer Level Packaging Technology

Author:

Zhao Wei1,Nakamoto Mark1,Dhandapani Karthikeyan1,Henderson Brian1,Lindley Ron1,Radojcic Riko1,Ray Urmi1,Gunterus Aurel1,Schwarz Mark1,Syed Ahmer1,Ramachandran Vidhya1

Affiliation:

1. Qualcomm Technologies, Inc., 5775 Morehouse drive, San Diego, CA 92121

Abstract

Abstract Electrical Chip Board Interaction (e-CBI) has emerged as a new risk in chip design as silicon die can directly interact with printed circuit board (PCB) in substrate-less wafer level packaging technology. To assess this risk Qualcomm Technologies, Inc. has converted an existing test chip to wafer level packaging technology. Both the measured data and simulation results show that e-CBI risk is significant and must be carefully managed.

Publisher

IMAPS - International Microelectronics Assembly and Packaging Society

Subject

General Medicine

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Adaptive Patterning and M‐Series for High Density Integration;Embedded and Fan‐Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces;2021-12-03

2. M-Series™ Fan-Out with Adaptive Patterning™;Advances in Embedded and Fan-Out Wafer-Level Packaging Technologies;2019-04-19

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