2.5D FPGA-HBM Integration Challenges

Abstract

Abstract FPGA partitioning and high density integration using interposer based 2.5D stacked silicon interconnect technology (SSIT) has been the pioneering work at Xilinx for several years enabling advanced applications in high performance computing, networking, hyper scale data center and cloud services etc. With the insatiable demand for acceleration workloads, FPGAs need to be coupled with in package memory to enable higher bandwidth, lower power and smaller form factor architecture. 3D stacking based high bandwidth memory (HBM) has paved the way to realize such applications providing 10X higher bandwidth, 4X lower power vs DDR4. This paper provides an overview of unique challenges involved with 2.5D FPGA-HBM SSIT integration from design, process/package development, test and reliability point of view