Affiliation:
1. *1Ajinomoto Co., Inc., 1-1 Suzuki-cho, Kawasaki-ku, Kawasaki-shi, 210-8681, Japan
Abstract
Abstract
Build-up process is a highly effective method for miniaturization and high density integration of printed circuit boards. Along with increasing demands for high transmission speed of electronic devices with high functionality, packaging substrates installed with semiconductors in such devices are strongly required to reduce the transmission loss. Our insulation materials are used in a semi-additive process (SAP) with low dielectric loss tangent, smooth resin surface after desmear, and good insulation reliability. Actually, the transmission loss of strip line substrates and Cu surface roughness impact on transmission loss were measured using our materials. Furthermore, low dielectric molding film with low coefficient of thermal expansion (CTE) and low Young's modulus are introduced.
Publisher
IMAPS - International Microelectronics Assembly and Packaging Society
Cited by
4 articles.
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