A Method for Reducing the Dead-Time Voltage and Impedance Voltage in a Series Voltage Compensator
Author:
Affiliation:
1. Aichi Institute of Technology
2. Momozono Densetsu Ltd.
Publisher
Institute of Electrical Engineers of Japan (IEE Japan)
Subject
Electrical and Electronic Engineering,Industrial and Manufacturing Engineering
Link
https://www.jstage.jst.go.jp/article/ieejias/131/10/131_10_1225/_pdf
Reference14 articles.
1. (1) H. Akagi: “Power System Harmonic Regulations and Suppression Technologies II. Power Electronic Technologies Corresponding with Power System Harmonic Regulations”, T. IEE Japan, Vol. 115-D, No. 9, pp. 1089-1091 (1995-9) (in Japanese)
2. (2) Y. Ohnogi, N. Kakimoto, K. Okumoto, and N. Yorino: “A Method of Suppressing Voltage Flicker in Distribution Systems”, T. IEE Japan, Vol. 109-B, No. 9, pp. 395-402 (1989-9) (in Japanese)
3. (3) J. Nishidai: “Harmonics Filters and Var Compensators”, T. IEE Japan, Vol. 108-D, No. 12, pp. 1078-1082 (1988-12) (in Japanese)
4. (4) F. Z. Peng, H. Akagi, and A. Nabae: “A New Approach to Harmonic Compensation in Power Systems—A combined system of series active and shunt passive filters”, T. IEE Japan, Vol. 109-D, No. 12, pp. 897-904 (1989-12) (in Japanese)
5. (5) T. Jimichi, H. Fujita, and H. Akagi: “A New Control Method for Suppression of the DC Magnetic Flux Incduced in Series Transformers Used for a Dynamic Voltage Restorer”, IEEJ Trans. IA, Vol. 127-D, No. 3, pp. 308-314 (2007-3) (in Japanese)
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2. A Design Strategy for the LCR Filter and Carrier Frequency in a Series Voltage Compensator;Journal of International Council on Electrical Engineering;2013-04
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