A Strategy for the Design of the LCR Filter in a Series Voltage Compensator
Author:
Affiliation:
1. Aichi Institute of Technology
2. Momozono Densetsu Ltd.
Publisher
Institute of Electrical Engineers of Japan (IEE Japan)
Subject
Electrical and Electronic Engineering,Industrial and Manufacturing Engineering
Link
https://www.jstage.jst.go.jp/article/ieejias/132/6/132_642/_pdf
Reference29 articles.
1. (1) M. Ueno, N. Fujiwara, N. Fukazu, T. Sato, H. Maekawa, and A. Nakata: “Field Test Verification of the Series Static Voltage Compensator for Power Distribution Line”, T. IEE Japan, Vol. 122-B, No. 12, pp. 1321-1329 (2002-12) (in Japanese)
2. (2) A. Nakata, A. Torii, and A. Ueda: “A Method for Reducing the Dead-Time Voltage and Impedance Voltage in a Series Voltage Compensator”, IEEJ Trans. IA, Vol. 131, No. 10, pp. 1225-1231 (2011-10) (in Japanese)
3. (3) M. Ohshima and E. Masada: “Novel Three-Phase Current-Regulated Digital PWM and its Behavioral Analysis”, IEEJ Trans. IA, Vol. 123, No. 5, pp. 533-546 (2003-5) (in Japanese)
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