Inverter Dead-Time Compensation and Control Scheme for Reducing Harmonic Distortion and Improving Conversion Efficiency
Author:
Affiliation:
1. Graduate School of Science and Technology, Nagasaki University
2. Shindengen Electric Mfg. Co., Ltd.
3. Department of Electrical and Electronic Engineering, Nagasaki University
Publisher
Institute of Electrical Engineers of Japan (IEE Japan)
Subject
Electrical and Electronic Engineering,Industrial and Manufacturing Engineering
Link
http://www.jstage.jst.go.jp/article/ieejias/130/1/130_1_26/_pdf
Reference14 articles.
1. (2) A. R. Munoz and T. A. Lipo: “On-line dead time compensation technique for open-loop PWM-VSI drives”, IEEE Trans. on Power Elec., Vol. 14. No. 4. pp. 683-689 (1999-7)
2. (3) D. Leggate and R. J. Kerkman: “Pulse based dead time compensator for PWM voltage inverter”, IEEE Trans. on Industrial Electronics, Vol. 44, No. 2, pp. 191-197 (1997-4)
3. (4) N. Urasaki, T. Senjyu, K. Uezato, and T. Funabashi: “On-line dead-time compensation method for voltage source inverter fed motor drives”, in Proc. IEEE APEC, pp. 122-127 (2004-2)
4. (5) B. Zhou, W. H. Lau, and H. Chung: “The analysis of a novel dead-time generation and compensation method for 2-level PWM topology”, IEEE PESC Record, pp. 1543-1547 (2006-6)
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