Bonding Properties of Package-on-Package Stack Interconnection Using by 150 ㎛ Height Copper Posts

Abstract

In this study, we used copper (Cu) posts, plated to a height of 150 μm, as interconnections to form electrodes between different package layers. The upper layer consisted of a chip-scale package (CSP), while the lower layer was made up of a flip chip-chip scale package (FCCSP). We plated a Cu post on the side of FCCSP substrate, and produced the FCCSP package by thermo-compression (TC) bonding with copper pillar solder bumps on the center of substrate. The surface of the bottom electrode for the upper CSP received a surface finish of electroless nickel, electroless palladium, and immersion gold (ENEPIG). The bonding surface of the lower FCCSP was the bare Cu surface of the epoxy-molded Cu post. The PoP joining process used a vacuum reflow process with solder paste and solder balls. To understand the package joint's characteristics, we measured voids and shear strength, and analyzed the cross-sectional microstructure. The temperature profile used in the PoP joining process demonstrated optimal joint characteristics with a joint void content of 2.3% and a joint strength of approximately 44 MPa when formic acid was utilized and the activation preheating time was extended. Cross-sectional warpage analysis of the PoP package revealed a minimal difference of approximately 31 μm between the center and the ends. This study successfully developed a stacked package with a PoP structure using Cu Post, and the bonding process was optimized to minimize warpage in the PoP package.