Author:
Lee Jang-Soo,Kim Shin-Dug,Weems Charles
Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software
Reference12 articles.
1. B. Abali, H. Franke, X. Shen, D.E. Poff, T.B. Smith, Performance of hardware compressed main memory, Proceedings of the Seventh International Symposium on High-Performance Computer Architecture, January 2001, pp. 73–81.
2. D. Burger, J.R. Goodman, A. Kagi, Memory bandwidth limitations of future microprocessors, Proceedings of the 23rd International Symposium on Computer Architecture, May 1996, pp. 79–90.
3. F. Douglis, The compression cache: using on-line compression to extend physical memory, Proceedings of the Winter USENIX Conference, January 1993, pp. 25–29.
4. Computer Architecture: A Quantitative Approach;Hennesey,1996
5. 100Mbit/s adaptive data compressor design using selectively shiftable content-addressable memory;Jones;Proceedings of the IEE,1992
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