Numerical reproducibility for the parallel reduction on multi- and many-core architectures

Author:

Collange Sylvain,Defour David,Graillat Stef,Iakymchuk RomanORCID

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Graphics and Computer-Aided Design,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software

Reference33 articles.

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3. Precision & performance: Floating point and IEEE 754 compliance for NVIDIA GPUs;Whitehead,2011

4. Differences in Floating-Point Arithmetic Between Intel® Xeon® Processors and the Intel® Xeon Phi™ Coprocessor;Corden,2013

5. Deterministic Reduction: a new Community Preview Feature in Intel® Threading Building Blocks;Katranov,2012

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