Application of nanosphere lithography to charge trap flash memories with patterned Si3N4 trap layers-Reference-Cited by-同舟云学术

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Application of nanosphere lithography to charge trap flash memories with patterned Si3N4 trap layers

Published:2012-10 Issue: Volume:98 Page:347-350
ISSN:0167-9317
Container-title:Microelectronic Engineering
language:en
Short-container-title:Microelectronic Engineering

Author:

An Ho-Myoung,Kim Hee-Dong,You Hee-Wook,Kim Kyeong Heon,Sung Yun Mo,Cho Won-Ju,Kim Tae Geun

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference16 articles.

1. A Direct Observation of the Distributions of Local Trapped-Charges and the Interface-States near the Drain Region of the Silicon–Oxide–Nitride–Oxide–Silicon Device for Reliable Four-Bit/Cell Operations

2. On the go with SONOS

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Plasmonic Hot Carrier‐Driven Photoelectrochemical Processes: Principle, Detection and Application;Advanced Materials Interfaces;2024-07-02

2. Plasmonic Hot Hole-Driven Water Splitting on Au Nanoprisms/P-Type GaN;ACS Energy Letters;2021-03-17

3. Comparison of Si3N4–SiO2 and SiO2 Insulation Layer for Zero-Bias CMUT Operation Using Dielectric Charging Effects;IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control;2020-04

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