Etch process modules development and integration in 3D-SOC applications-Reference-Cited by-同舟云学术

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Etch process modules development and integration in 3D-SOC applications

Published:2018-09 Issue: Volume:196 Page:38-48
ISSN:0167-9317
Container-title:Microelectronic Engineering
language:en
Short-container-title:Microelectronic Engineering

Author:

Tutunjyan Nina,Sardo Stefano,De Vos Joeri,Van Huylenbroeck Stefaan,Jourdain Anne,Peng Lan,Inoue Fumihiro^ORCID,Rassoul Nouredine^ORCID,Beyer Gerald,Beyne Eric,Miller Andy,Piumi Daniele

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference8 articles.

1. “International Technology Roadmap for Semiconductors (ITRS): 2010 Edition”, Semiconductor Industry Association, 2010.

2. From 3D-SOC to 3D heterogeneous systems: technology and applications;Ancey,2011

3. The 3-D interconnect technology landscape;Beyne;IEEE Des. Test,2016

4. IMEC Industrial Affiliation Program - 3D System Integration Program (Technical Annex);Beyne,2016

5. “Hole-in-One TSV”, a New Via Last Concept for High Density 3D-SOC Interconnects;De Vos,2018

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Through Silicon Via Oxide Etch Back for Via-last Integration Scheme;2022 IEEE 24th Electronics Packaging Technology Conference (EPTC);2022-12-07

2. Microsystems using three-dimensional integration and TSV technologies: Fundamentals and applications;Microelectronic Engineering;2019-04

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