1. A 90-nm Logic Technology Featuring Strained-Silicon
2. T. Ghani, K. Mistry, P. Packan, S. Thompson, M. Stettler, S. Tyagi, M. Bohr, in: IEEE Int. Symp. VLSI Tech. Dig., 2000, pp. 174–175.
3. Strained Si, SiGe, and Ge channels for high-mobility metal-oxide-semiconductor field-effect transistors
4. R. Khamankar, H. Bu, C. Bowen, S. Chakravarthi, P.R. Chidambaram, M. Bevan, A. Krishnan, H. Niimi, B. Smith, J. Blatchford, B. Hornung, J.P. Lu, P. Nicollian, B. Kirkpatrick, D. Miles, M. Hewson, D. Farber, L. Hall, H. Alshareef, A. Varghese, A. Gurba, V. Ukraintsev, B. Rathsack, J. De-Loach, J. Tran, C. Kaneshige, M. Somervell, S. Aur, C. Machala, T. Grider, in: IEEE Int. Symp. VLSI Tech. Dig., 2004, pp. 162–163.
5. Impact strain engineering on gate stack quality and reliability