CFCET: A hardware-based control flow checking technique in COTS processors using execution tracing

Author:

Rajabzadeh Amir,Miremadi Seyed Ghassem

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference27 articles.

1. Error detection enhancement in COTS superscalar processors with performance monitoring features;Rajabzadeh;J Electron Testing: Theory Appl (JETTA),2004

2. Rajabzadeh A, Miremadi G. Transient detection in COTS processors using software approach. J Microelectron Reliab, in press, doi:10.1016/j.microrel.2004.10.013.

3. Srinivasan J, Lundqvist K. Real-time architecture analysis: a COTS perspective. In: Proceedings of the 21st digital avionics systems, 2002, vol. 1. p. 5D4-1–9.

4. He Y, Avizienis A. Assessment of the applicability of COTS microprocessors in high-confidence computing systems: a case study. In: Proceedings of the international conference on dependable systems and networks (DSN-2000), June 2000. p. 81–6.

5. Multiparadigm scheduling for distributed real-time embedded computing;Gill;Proc IEEE,2003

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