FPGA-based switch-level fault emulation using module-based dynamic partial reconfiguration-Reference-Cited by-同舟云学术

FPGA-based switch-level fault emulation using module-based dynamic partial reconfiguration

Published:2008-10 Issue:10 Volume:48 Page:1724-1733
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Lee Peter Ming-Han,Sedaghat Reza

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference27 articles.

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3. Parreira A, Teixeira JP, Santos M. A novel approach to FPGA-based hardware fault modeling and simulation. In: Proceedings of the design and diagnostics of electronic circuits and synt. workshop; 2003, p. 17–24.

4. Leveugle R. Towards modeling for dependability of complex integrated circuits, IEEE international on-line testing workshop; 1999, p. 194–8.

5. Fault emulation: a new methodology for fault grading;Cheng;IEEE Trans Computer-Aided Design Integrated Circ Syst,1999

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