Author:
Ker Ming-Dou,Chang Wei-Jen
Subject
Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials
Reference21 articles.
1. Impact of MOSFET gate oxide breakdown on digital circuit operation and reliability;Kaczer;IEEE Trans Electron Dev,2002
2. A 3/5V compatible I/O buffer;Pelgrom;IEEE J Solid-State Circ,1995
3. High-voltage-tolerant I/O buffers with low-voltage CMOS process;Singh;IEEE J Solid-State Circ,1999
4. Chuang C-H, Ker M-D. Design on mixed-voltage-tolerant I/O interface with novel tracking circuits in a 0.13-μm CMOS technology. In: Proc IEEE int symp circuits and systems; 2004. p. 577–80.
5. Whole-chip ESD protection design with efficient VDD-to-VSS ESD clamp circuits for submicron CMOS VLSI;Ker;IEEE Trans Electron Dev,1999
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