A practical metric for soft error vulnerability analysis of combinational circuits

Author:

Raji Mohsen,Pedram Hossein,Ghavami Behnam

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference52 articles.

1. Soft errors in advanced computer systems;Baumann;IEEE Trans Device Mater Reliab,2005

2. Dhillon YS, Diril A, Chatterjee A. Soft-error tolerance analysis and optimization of nanometer circuits. Design, automation and test in Europe (DATE); 2005. p. 288–93.

3. Dixit A, Wood A. The impact of new technology on soft error rates. In: International reliability physics symposium (IRPS); 2011. p. 5B.4.1–5B.4.7.

4. Seifert N, Gill B, Foley K, Relangi P. Multi-cell upset probabilities of 45nm high-K+ metal gate SRAM devices in terrestrial and space environments. In: International reliability physics symposium (IRPS); 2008. p. 181–6.

5. JEDEC standard: measurements and reporting of alpha particles and terrestrial comic ray-induced soft errors in semiconductor devices. Technical Report JESD89, Aug. 2001.

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