Advanced analysis on board trace reliability of WLCSP under drop impact

Author:

Syed Ahmer,Tee Tong Yan,Ng Hun Shen,Anderson Rex,Khoo Choong Peng,Rogers Boyd

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference13 articles.

1. Fan XJ, Han Q. Design and reliability in wafer level packaging. In: 10th EPTC conference proc, Singapore; 2008. p. 834–41.

2. Wafer level chip scale packaging (WL-CSP): an overview;Garrou;IEEE Trans Adv Pack,2000

3. Impact life prediction modeling of TFBGA packages under board level drop test;Tee;Microelectron Reliab J,2004

4. Luan JE, Tee TY, Goh KY, Ng HS, Baraton X, Bronner R, et al. Drop impact life prediction model for lead-free BGA packages and modules Eurosime conference proc, Germany; 2005. p. 559–65.

5. Ibe E, Loh K, Luan JE, Tee TY. Effect of unfilled underfills on drop impact reliability performance of area array packages. In: 56th ECTC conference proc; 2006. p. 462–6.

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