Investigation on temperature limitation and failure mechanism of SiC MOSFETs under avalanche conditions-Reference-Cited by-同舟云学术

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Investigation on temperature limitation and failure mechanism of SiC MOSFETs under avalanche conditions

Published:2023-11 Issue: Volume:150 Page:115106
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Fei Haoyang,Liang Lin,Zhang Ziyang

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference25 articles.

1. Single-pulse avalanche mode robustness of commercial 1200 V/80 mΩ SiC MOSFETs;Kelley;IEEE Trans. Power Electron.,2017

2. Single-pulse avalanche mode operation of 10-kV/10-a SiC MOSFET;Kelley;Microelectron. Reliab.,2018

3. Mathematical modelling of solidification and melting: a review;Hu;Model. Simul. Mater. Sci. Eng.,1996

4. Comprehensive investigations on degradations of dynamic characteristics for SiC power MOSFETs under repetitive avalanche shocks;Wei;IEEE Trans. Power Electron.,2019

5. Effect of random surface charge distribution on transport in 4H-SiC MOSFETs;Potbhare,2009

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