Author:
Liu L.,Xu J.P.,Chen L.L.,Lai P.T.
Subject
Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials
Reference8 articles.
1. Memory technology in the future;Kim;Microelectron Eng,2007
2. Chen YY et al. Programming efficiency of stacked-gate flash memories with high-κ dielectrics. In: IEEE conference on emerging technologies-nanoelectronics; 2006. p. 302–5.
3. Yoshikawa K. Research challenges for next decade flash memories. Int. electron device and material symposia (IEDMS); 2000. p. 11–8.
4. SONOS-type flash memory cell with metal/Al2O3/SiN/Si3N4/Si structure for low-voltage high-speed program/erase operation;Shim;IEEE Electron Dev Lett,2008
5. Electrical characteristics of memory devices with a high-κ HfO2 trapping layer and dual SiO2/Si3N4 tunneling layer;Wang;IEEE Trans Electron Dev,2007
Cited by
3 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Atomic-Resolution Study of β-Si3N4/SiO2 Interfaces;Atomic Scale Characterization and First-Principles Studies of Si₃N₄ Interfaces;2011
2. Silicon Nitride Ceramics;Atomic Scale Characterization and First-Principles Studies of Si₃N₄ Interfaces;2011
3. Crystal-induced effects at crystal/amorphous interfaces: The case ofSi3N4/SiO2;Physical Review B;2010-08-25