ESD protection strategies in advanced CMOS SOI ICs-Reference-Cited by-同舟云学术

ESD protection strategies in advanced CMOS SOI ICs

Published:2007-09 Issue:9-11 Volume:47 Page:1313-1321
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Khazhinsky M.G.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference30 articles.

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3. Modular, portable, and easily simulated ESD protection networks for advanced CMOS;Torres;EOS/ESD Symp Proc,2001

4. Boosted and distributed rail clamp networks for ESD protection in advanced CMOS technologies;Stockinger;EOS/ESD Symp Proc,2003

5. Advanced rail clamp networks for ESD protection;Stockinger;Microelectron Reliab,2005

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